NDS32 Options (Using the GNU Compiler Collection (GCC))

#### 3.20.35 NDS32 Options ¶

These options are defined for NDS32 implementations:

`-mbig-endian` ¶
`-EB`

  Generate code in big-endian mode.

`-mlittle-endian` ¶
`-EL`

  Generate code in little-endian mode.

`-mabi=2` ¶
`-mfloat-abi=soft`

  Use the soft floating-point ABI.

`-mabi=2fp+`
`-mfloat-abi=hard`

  Use the hard floating-point ABI.

`-mreduced-regs` ¶

  Use reduced-set registers for register allocation.

`-mfull-regs` ¶

  Use full-set registers for register allocation.

`-malways-align` ¶

  Always align function entry, jump targets, and return address.

`-malign-functions` ¶

  Align function entry to 4 bytes.

`-mfp-as-gp` ¶
`-mno-fp-as-gp`

  Enable/disable fp-as-gp optimization.

`-mcmov` ¶
`-mno-cmov`

  Enable/disable generation of conditional move instructions.

`-mhw-abs` ¶
`-mno-hw-abs`

  Enable/disable generation of hardware abs instructions.

`-mext-perf` ¶
`-mno-ext-perf`

  Enable/disable generation of performance extension instructions.

`-mext-perf2` ¶
`-mno-ext-perf2`

  Enable/disable generation of performance extension 2 instructions.

`-mext-string` ¶
`-mno-ext-string`

  Enable/disable generation of string extension instructions.

`-mext-dsp` ¶
`-mno-ext-dsp`

  Enable/disable generation of DSP extension instructions.

`-mext-fpu-fma` ¶
`-mno-ext-fpu-fma`

  Enable/disable generation of floating-point multiply-accumulation instructions.

`-mext-fpu-sp` ¶
`-mno-ext-fpu-sp`

  Enable/disable generation of single-precision floating-point instructions.

`-mext-fpu-dp` ¶
`-mno-ext-fpu-dp`

  Enable/disable generation of double-precision floating-point instructions.

`-mv3push` ¶
`-mno-v3push`

  Enable/disable generation of v3 push25/pop25 instructions.

`-m16-bit` ¶
`-mno-16-bit`

  Enable/disable generation of 16-bit instructions.

`-mvh` ¶
`-mno-vh`

  Enable/disable Virtual Hosting support.

`-misr-vector-size=num` ¶

  Specify the size of each interrupt vector, which must be 4 or 16.

`-misr-secure=num` ¶

  Specify the security level of c-isr for the whole file.

`-mcache-block-size=num` ¶

  Specify the size of each cache block, which must be a power of 2 between 4 and 512.

`-march=arch` ¶

  Specify the target architecture. arch may be one of ‘`v2`’, ‘`v3`’, ‘`v3j`’, ‘`v3m`’, ‘`v3f`’, or ‘`v3s`’.

`-mcpu=cpu` ¶

  Specify the CPU to compile for. cpu may be one of ‘`n6`’, ‘`n650`’, ‘`n7`’, ‘`n705`’, ‘`n8`’, ‘`n801`’, ‘`sn8`’, ‘`sn801`’, ‘`s8`’, ‘`s801`’, ‘`e8`’, ‘`e801`’, ‘`n820`’, ‘`s830`’, ‘`e830`’, ‘`n9`’, ‘`n903`’, ‘`n903a`’, ‘`n968`’, ‘`n968a`’, ‘`n10`’, ‘`n1033`’, ‘`n1033a`’, ‘`n1033-fpu`’, ‘`n1033-spu`’, ‘`n1068`’, ‘`n1068a`’, ‘`n1068-fpu`’, ‘`n1068a-fpu`’, ‘`d10`’, ‘`d1088`’, ‘`d1088-fpu`’, ‘`d1088-spu`’, ‘`n15`’, ‘`d15`’, ‘`n15s`’, ‘`d15s`’, ‘`n15f`’, ‘`d15f`’, ‘`n12`’, ‘`n1213`’, ‘`n1233`’, ‘`n1233-fpu`’, ‘`n1233-spu`’, ‘`n13`’, ‘`n1337`’, ‘`n1337-fpu`’, ‘`n1337-spu`’, or ‘`simple`’.

`-mconfig-fpu=num` ¶

  Specify a FPU configuration value from 0 to 7; 0–3 is as FPU spec says, and 4–7 correspond to 0–3.

`-mconfig-mul=type` ¶

  Specify configuration for multiply instruction. type can be one of ‘`fast`’, ‘`fast1`’ (equivalent to ‘`fast`’), ‘`fast2`’, or ‘`slow`’. The default is ‘`fast1`’.

`-mconfig-register-ports=kind` ¶

  Specify the numbers of read/write ports for n9/n10 cores. The value should be ‘`3r2w`’ or ‘`2r1w`’.

`-mcmodel=code-model` ¶

  Set the code model to one of:

  ‘`small`’

    All the data and read-only data segments must be within 512KB addressing space. The text segment must be within 16MB addressing space.

  ‘`medium`’

    The data segment must be within 512KB while the read-only data segment can be within 4GB addressing space. The text segment should be still within 16MB addressing space.

  ‘`large`’

    All the text and data segments can be within 4GB addressing space.

  The default is ‘`large`’ on GNU/Linux targets and ‘`medium`’ on other ELF targets.

`-mctor-dtor` ¶
`-mno-ctor-dtor`

  Enable/disable constructor/destructor feature.

`-mrelax` ¶
`-mno-relax`

  Enable/disable linker option to relax instructions.

`-mrelax-hint` ¶
`-mno-relax-hint`

  Enable/disable insertion of hints for linker to do relaxation.

`-msched-prolog-epilog` ¶
`-mno-sched-prolog-epilog`

  Enable/disable scheduling of a function’s prologue and epilogue sequence.

`-mret-in-naked-func` ¶
`-mno-ret-in-naked-func`

  Enable/disable generation of return instructions in naked functions. This option is enabled by default.

`-malways-save-lp` ¶
`-mno-always-save-lp`

  Enable/disable always saving `$lp` on the stack.

`-munaligned-access` ¶
`-mno-unaligned-access`

  Enable/disable unaligned word and halfword accesses to packed data.

`-minline-asm-r15` ¶
`-mno-inline-asm-r15`

  Allow/disallow use of r15 for inline asm.