PowerPC AltiVec/VSX Built-in Functions Available on Future ISA (Using the GNU Compiler Collection (GCC))

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7.13.24.6 PowerPC AltiVec/VSX Built-in Functions Available on Future ISA ¶

The following additional built-in functions are available for the PowerPC family of processors, starting with Future ISA.

Future ISA of the PowerPC may add new instructions for accelerating AES algorithm. GCC provides support for these new instructions through the following built-in functions. The third argument to __builtin_aes_encrypt_paired and __builtin_aes_decrypt_paired must be a constant integer that is 0, 1 or 2. The values correspond to 128, 192 and 256 bit AES encryption/decryption respectively. The third argument to __builtin_galois_field_mult must be a constant integer that is 0 or 1. The values correspond to gcm and xts variant respectively.

__vector_pair  __builtin_aes_encrypt_paired (__vector_pair, __vector_pair,
                                             int);

__vector_pair  __builtin_aes128_encrypt_paired (__vector_pair, __vector_pair);

__vector_pair  __builtin_aes192_encrypt_paired (__vector_pair, __vector_pair);

__vector_pair  __builtin_aes256_encrypt_paired (__vector_pair, __vector_pair);

__vector_pair  __builtin_aes_decrypt_paired (__vector_pair, __vector_pair,
                                             int);

__vector_pair  __builtin_aes128_decrypt_paired (__vector_pair, __vector_pair);

__vector_pair  __builtin_aes192_decrypt_paired (__vector_pair, __vector_pair);

__vector_pair  __builtin_aes256_decrypt_paired (__vector_pair, __vector_pair);

__vector_pair  __builtin_aes_genlastkey_paired (__vector_pair, int);

__vector_pair  __builtin_aes128_genlastkey_paired (__vector_pair);

__vector_pair  __builtin_aes192_genlastkey_paired (__vector_pair);

__vector_pair  __builtin_aes256_genlastkey_paired (__vector_pair);

vec_t __builtin_galois_field_mult (vec_t, vec_t, int);

vec_t __builtin_galois_field_mult_gcm (vec_t, vec_t);

vec_t __builtin_galois_field_mult_xts (vec_t, vec_t);

PowerPC Vector Integer Multiply High Built-in Functions ¶

Future PowerPC processors may add new instructions for vector integer multiply high for halfword. GCC provides support for these instructions through the following built-in functions.

vector signed short

vec_mulh (vector signed short a, vector signed short b);

vector unsigned short

vec_mulh (vector unsigned short a, vector unsigned short b);

For each integer value i from 0 to 7, do the following. The integer value in halfword element i of a is multiplied by the integer value in halfword element i of b. The high-order 16 bits of the 32-bit product are placed into halfword element i of the vector returned.